555 Timer, as the name suggests, is an IC used for timing operations. It is a monolithic timing circuit that produces highly stable time delays or oscillations with great accuracy. In 555 Timer three 5K resistors are interconnected to provide a reference voltage for two internal comparators, that’s why it is called 555 Timer. 555 Timer IC was invented by Signetic Corporation in 1970. Due to its ease of use and low cost, it has been used in a wide range of applications. This IC is used as an astable and monostable multivibrator in waveform generators, digital logic probes, dc-dc converter, voltage regulator, tachometer, temperature measurement and controlled devices, etc.
Working
In the above diagram of 555 timer IC, there are three 5K resistors, two comparator op-amp, one S-R flip flop, one npn-transistor and one output buffer. Obviously, there are more internal components in 555 timer IC but these components are enough to understand the internal working of this IC.
The output of two comparators are connected to R and S pins of flip-flop and inverted output of flip-flop is connected to base of discharged transistor(npn) and also the inverted output of S-R flip-flop is fed to output buffer which is inverted by buffer to produce the final output.
When the voltage at pin 2 is less than the voltage at point b (1/3 of Vcc), output at pin 3 turns ‘HIGH’ and when the voltage at pin 6 becomes greater than the voltage at point a (2/3 of Vcc), output at pin 3 turns ‘LOW’.
555 Timer Pinout
GroundIt should be connected to the negative/ground pin of the supply.
TriggerIt is the negative input of the lower comparator. As soon as the voltage at this pin drops below 1/3 Vcc, the output of lower comparator switch from ‘LOW’ to ‘HIGH’ which sets the output of S-R flip flop i.e, Q to ‘HIGH’ or ‘LOW’.
OutputThe output pin can drive any TTL circuit and is capable of sourcing or sinking up to 200mA of current at an output voltage equal to approximately Vcc – 1.5V so small speakers, LEDs or motors can be connected directly to the output.
ResetThis pin is used to ‘RESET’ the internal Flip-flop controlling the state of the output, pin 3, in spite of any voltage level at S and R pin of S-R flip-flop level. This is an active-low input and is generally connected to a logic ‘HIGH’ to prevent any unwanted ‘RESET’ of the output.
Control VoltageThis pin controls the timing of the 555 by overriding the 2/3Vcc level of the voltage divider network. By applying a voltage to this pin the width of the output signal can be varied independently of the RC timing network. When not used it is connected to ground via a 10nF capacitor to eliminate any noise.
ThresholdIt is the positive input to the upper comparator when the voltage at this pin exceeds 2/3 Vcc output at pin 3 turns ‘LOW’.
DischargeWhen the base of discharge transistor turns ‘HIGH’ this transistor is used to discharge external RC network connected at pin 7 also during discharging output at pin 3 stays ‘LOW’.
VccThis is the power supply pin and for general purpose TTL 555 timers are between 4.5V and 15V.
Basic Modes of 555 timer
Basically working of 555 timer is divided into 3 categories which are discussed below:
- Astable Mode: In this mode output at pin 3 continuously fluctuates between state ‘HIGH’ and ‘LOW’. This mode is used in applications where we need 555 timer as clock source.
- Monostable Mode: In this mode output turns ‘HIGH’ for particular period of time only when negative trigger pulse is applied at pin 2, which should be less than 1/3 Vcc.
- Bi-stable Mode: In this mode of operation output turns ‘HIGH’/’LOW’ based on where negative trigger pulse is applied at pin 2.
Astable Mode of Operation of 555 timer
Astable mode as the name suggests, the output of this mode is oscillating between ‘HIGH’ and ‘LOW’ and the frequency of oscillation depends upon an external RC network connected to its pins.
There are two resistors ‘R1’ and ‘R2’ and one capacitor ‘C’. ‘R1’ is connected between pin 8 and pin 7. ‘R2’ is connected between pin 7 and pin 6. Pin 2 and 6 are shorted. Capacitor ‘C’ is connected between pin 6 and the Ground.
Initially when Power is turned ‘ON’, the potential across the capacitor is zero and hence potential at junction ‘b’ is greater than the potential at pin 2 due to which the Output of the lower comparator turns ‘HIGH’ which ‘SETS’ the output of the Flip-flop, i.e., Q is ‘HIGH’ and Q’ is ‘LOW’ which is then fed into output buffer which inverts it and the final output is ‘HIGH’.
Now when the voltage across the capacitor exceeds 1/3 Vcc, it doesn’t have any effect on the lower comparator. Although the output of the lower comparator is ‘LOW’, it doesn’t affect the output of the S-R flip-flop.
But as soon as voltage across the capacitor exceeds 2/3 of Vcc the voltage across the positive terminal exceeds voltage across the negative terminal of the upper comparator, which in turn ‘RESETS’ the flip-flop i.e Q turns ‘LOW’ which implies Q’ turns ‘HIGH’ which is fed into Output buffer which inverts it and hence output turns ‘LOW’.
Now what we get from the above operation is when the capacitor charges Output is ‘HIGH’.
Now Q’ which is ‘HIGH’ is also fed to base of npn transitor which in turns provides less resistance (equivalent to zero) for current rather than going through resistance ‘R2’ and Capacitor ‘C’. Hence all the current which previously was flowing through R2 and C now flows through transistor, also the potential across Capacitor ‘C’ starts decreasing because it is also discharging through Discharge transistor.
Now as the capacitor is discharging a point came in this operation when voltage across capacitor turns less than 1/3 Vcc which implies voltage at negative input is less than voltage at positive input, which turns the output of lower comparator ‘HIGH’ and thereby setting the output of flip flop i.e Q is ‘HIGH’ and Q’ is ‘LOW’ , now Q’ is also being fed to base of discharge transistor which turns ‘Off’ thereby discharging stops.
Now what we get from the above operation is when the capacitor discharges output turns ‘LOW’.
Also Q’ is fed to the output buffer and hence voltage at pin 3 turns ‘HIGH’.
This charging and discharging of the capacitor go on and on until power is turned ‘OFF’ or any component failure occurs.
Mathematical Derivation
Here we will not go very deep inside the mathematics of charging and discharging curves we just need the output of this astable operation i.e,
Time for which pulse is ‘HIGH’ when current flows through R1, R2, and C at charging time i.e.,
T (high) = 0.693(R1+R2)*C
Time for which pulse is ‘LOW’ when current flows through R2 and C at time of discharging i.e.,
T (low) = 0.693(R2)*C
Hence, T(total) = T(high) + T(low)
T = 0.693(R1+2R2)C
F = 1/T = 1.44/((R1+2R2)C)
Duty Cycle = T(high)/T(total)
= 0.693(R1+R2)C/0.693(R1+2R2)C
= (R1+R2)/(R1+2R2)
from the above equation, it seems that the duty cycle is more than 50%.
Let’s say R1 is very less than R2
i.e., if R1 = 1K, then R2 = 100K
Duty Cycle = 101/201 = 0.502 which is approximately equal to 0.5. That’s what we want.
Now this astable multivibrator can be used as a clock source for other circuits which are clock dependent for their operation.
Now for a higher frequency, we need to keep capacitance ‘C’ low for lower frequency, we need to keep ‘C’ high as simple as that.
Monostable Mode of Operation of 555 timer
This mode of operation is only used when output turns ‘HIGH’ only when input is triggered with negative pulse.
Here as you can see in the above image, there is a push button connected to pin 2 for providing a negative trigger and it is connected to ground at another end. Resistance R2 is connected between pin 2 and Vcc(pin 8). Pin 7 is shorted with pin 6 and R1 is connected between their junction and pin 8.
Now when the circuit is turned ‘ON’ voltage at junction ‘P’ is 0V because initially when capacitor is discharged, it behaves as shorted path as current flows through the path shown by ‘BLUE’ lines.
As soon as the potential across capacitor exceeds ‘2/3 Vcc’ level i.e., potential at pin 6, positive terminal of upper comparator exceeds voltage at negative terminal (2/3 Vcc), output of upper comparator turns ‘HIGH’ which leads to ‘RESET’ of flip-flop.
When flip flop is ‘RESET’ Q is at level ‘LOW’ and Q’ is at level ‘HIGH’ due to which npn transistor provides a short path for current that was previously flowing through the capacitor. Also when npn transistor is turned ‘ON’ the capacitor discharges through the path as shown by the ‘BLACK’ arrows until the potential across capacitor turns equal to the potential across transistor.
Hence when power is turned ‘ON’ all above operation happens and the normal flow of current is shown by red arrows, current flows through resistor R1, and through the discharge transistor via junction ‘P’.
At an instant when the trigger pulse is applied at pin 2, potential at the positive pin of the lower comparator exceeds the potential at the negative pin and hence the output of the lower comparator turns ‘HIGH’ which ‘SETS’ the output of S-R flip-flop.
Now when Q is ‘HIGH’ and Q’ is ‘LOW’ base of npn transistor turns ‘LOW’ hence it is turned ‘OFF’. Now current will not flow through npn transistor and it will pass through the capacitor. Above operations happen instantaneously.
Hence when a negative pulse is applied at pin 2 by pressing the push button, capacitor charges and the path of current is shown by ‘BLUE’ arrows. It will continuously charge until potential at positive terminal exceeds potential at negative terminal (2/3 Vcc) of upper comparator.
This process ‘RESETS’ flip flop and hence npn transistor is turned ‘ON’ and current will flow through it as shown by ‘RED’ arrows also capacitor discharges through npn transistor as shown by ‘BLACK’ arrows until when potential across the capacitor turns equal to potential across transistor. And current will follow path shown by ‘RED’ arrows till next input pulse is applied.
Hence in Monostable operation of 555 timer stable output is ‘LOW’. When trigger pulse is applied the output turns ‘HIGH’ till voltage across the capacitor reaches to 2/3 Vcc from ‘0 V’.
Hence this circuit is called Monostable Mode of operation of 555 timer.
Output will remain high till capacitor charges, hence when capacitor is charged, the time period output pulse is:
T = 1.1*R1*C
This is the time for which the output pulse is high.
If R1 = 1K and C = 1uF, then T = 1.1 * 1000 * 0.000001 sec = 1.1 * 0.001 sec = 1.1 ms
Bistable Mode of operation of 555 timer
This circuit is the simplest one of all 3 modes of operation. In this circuit R2 is connected between pin 8 and pin 2 and push button 1 is connected between pin 2 and ground. When button 1 is pressed it will trigger a negative pulse at pin 2.
Resistance R1 is connected between pin 8 and pin 4 (‘RESET’ pin) and push button 2 is connected between pin 4 and ground. When button 2 is pressed, it will provide a negative pulse at pin 4.
When the circuit is turned ‘ON’, ‘RESET’ pin is ‘HIGH’ and potential at pin 2(negative input of lower comparator) is greater than potential at its +ve terminal hence its output is ‘LOW’.
Hence nothing happens instantaneously in circuit when power is turned ‘ON’ and output at pin 3 is ‘LOW’.
As soon as trigger pulse is applied at pin 2 when button is pressed negative input of lower comparator is shorted with ground and hence output of lower comparator turns ‘HIGH’ which ‘SETS’ the flip-flop i.e., Q is ‘HIGH’ and Q’ is ‘LOW’ and ultimately when Q’ passed through output buffer, output at pin 3 turns ‘HIGH’.
It will remain ‘HIGH’ until S-R flip-flop ‘RESETS’ and it will reset only when pin 4 is pulled to potential ‘LOW’ that’s why we have push button 2.
As soon as button 2 is pressed S-R flip flop ‘RESETS’ and Q turns ‘LOW’, Q’ turns ‘HIGH’ and ultimately output at pin 3 turns ‘LOW’.
If we don’t push button 2, output will remain ‘HIGH’. Hence this circuit is bistable mode on 555 timer IC because both output ‘HIGH’ and ‘LOW’ are stable outputs.
FAQ’S
Why is 555 IC called a universal timer?
The 555 timer IC is commonly referred to as the “universal timer” because of its widespread use and versatility in a wide range of electronic applications.
Why is IC 555 called a timer circuit?
The IC 555 is called a because its primary application is to generate accurate time delays or intervals.
What are 555 timers used for?
The 555 timer IC can be used in electronic circuits for various timing and oscillator applications. It is used in various timers, pulse generators, lamp flashers, logic clocks, and oscillators.
